Current Issue : October - December Volume : 2018 Issue Number : 4 Articles : 5 Articles
This work presents the design, construction and testing of a new embedded sensor\nsystem for monitoring concrete curing. A specific mote has been implemented to withstand the\naggressive environment without affecting the measured variables. The system also includes a real-time\nmonitoring application operating from a remote computer placed in a central location. The testing\nwas done in two phases: the first in the laboratory, to validate the functional requirements of the\ndeveloped devices; and the second on civil works to evaluate the functional features of the devices,\nsuch as range, robustness and flexibility. The devices were successfully implemented resulting in a\nlow cost, highly reliable, compact and non-destructive solution....
We propose a prototype of field programmable gate array (FPGA) implementation for optimal pixel adjustment process (OPAP)\nalgorithmof image steganography. In the proposed scheme, the cover image and the secret message are transmitted froma personal\ncomputer (PC) to an FPGA board using RS232 interface for hardware processing. We firstly embed ...
Embedded systems continue to execute computational- and memory-intensive applications\nwith vast data sets, dynamic workloads, and dynamic execution characteristics. Adaptive distributed\nand heterogeneous embedded systems are increasingly critical in supporting dynamic execution\nrequirements. With pervasive network access within these systems, security is a critical design\nconcern that must be considered and optimized within such dynamically adaptive systems.\nThis paper presents a modeling and optimization framework for distributed, heterogeneous\nembedded systems. A dataflow-based modeling framework for adaptive streaming applications\nintegrates models for computational latency, mixed cryptographic implementations for inter-task\nand intra-task communication, security levels, communication latency, and power consumption.\nFor the security model, we present a level-based modeling of cryptographic algorithms using mixed\ncryptographic implementations. This level-based security model enables the development of an\nefficient, multi-objective genetic optimization algorithm to optimize security and energy consumption\nsubject to current application requirements and security policy constraints. The presented\nmethodology is evaluated using a video-based object detection and tracking application and several\nsynthetic benchmarks representing various application types and dynamic execution characteristics.\nExperimental results demonstrate the benefits of a mixed cryptographic algorithm security model\ncompared to using a single, fixed cryptographic algorithm. Results also highlight how security\npolicy constraints can yield increased security strength and cryptographic diversity for the same\nenergy constraint....
Timing optimization for logic circuits is one of the key steps in logic synthesis. Extant research data are mainly proposed based\non various intelligence algorithms. Hence, they are neither comparable with timing optimization data collected by the mainstream\nelectronic design automation (EDA) tool nor able to verify the superiority of intelligence algorithms to the EDA tool in terms of\noptimization ability. To address these shortcomings, a novel verification method is proposed in this study. First, a discrete particle\nswarmoptimization (DPSO) algorithmwas applied to optimize the timing of themixed polarityReed-Muller (MPRM) logic circuit.\nSecond, the Design Compiler (DC) algorithm was used to optimize the timing of the same MPRM logic circuit through special\nsettings and constraints. Finally, the timing optimization results of the two algorithms were compared based onMCNC benchmark\ncircuits.Thetiming optimization results obtained usingDPSOare comparedwith those obtained fromDC, andDPSOdemonstrates\nan average reduction of 9.7% in the timing delays of critical paths for a number of MCNC benchmark circuits. The proposed\nverification method directly ascertains whether the intelligence algorithm has a better timing optimization ability than DC....
In order to solve the problem that the PKE (passive keyless enter) with a\nfixed-frequency used in middle and low grade cars was interfered and broken\neasily, which led to the damage of anti-theft system and even the loss of cars,\nand in order to ensure the PKE can be used long and be expanded and upgraded\nin the future, a new, low power consumption and high reliability PKE\nwas designed with the S3C2410 microprocessor which is based on ARM9\nand the RF transceiver chip nRF905 which has the function of frequency\nmodulation. As frequency-hopping communication technology was used in\nthe system, the information would not be disturbed or blocked in the communication\nprocess, which increased the reliability of the system. With reasonable\npower-management module, the system power consumption was greatly reduced.\nTest shows that the new PKE can well meet the practical application....
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